1. Field of the Invention
This invention relates to the field of computer network point to point data communications, and more particularly to communications links that normally use constant idle bit streams between packet transmissions.
2. Background
a. Communications Networks
There are many different types of networks, network systems, and network devices for sharing files and resources or for otherwise enabling communication between two or more computers, PCs (personal computers), workstations, telephones, etc. The term “network device”, “network node” or “network component” generally refers to a computer linked to a network via a network interface card (NIC), or refers to other devices or apparatus that perform specialized functions in the network, such as repeaters, bridges, switches, routers, brouters, to name a few examples. Networks may be categorized based on various features and functions. For example, the range of a network refers to the distance over which nodes are distributed, such as local-area networks (LANs) within an office or floor of a building, wide-area networks (WANs) spanning across a college campus, or a city or a state, and global-area networks (GANs) spanning across national boundaries.
In designing a network, there are a large number of possible network configurations (such as ring, tree, star, hybrid combinations of these, etc.) and communication protocols (such as analog or digital and isochronous or non-isochronous) from which to choose. For example, a star-topology network has data sources and sinks coupled to nodes and the nodes are coupled to a central hub in a star topology. Each node (which may have one or more data sources and sinks coupled thereto) assembles the data received from the one or more data sources coupled to it into the designated frame template and transmits it to the hub.
Many networks operate in accordance with the OSI (Open Systems Interconnection) Reference Model, which is a seven-layer model developed by the ISO (International Standardization Organization). The OSI Reference Model describes how to interconnect any combination of network devices in terms of seven functional layers organized in a hierarchy, and specifies the functions that must be available at each layer. From highest level of the hierarchy to lowest level of the hierarchy, the OSI Reference Model includes the Application layer, the Presentation Layer, the Session Layer, the Transport Layer, the Network Layer, the Data-Link Layer and the Physical Layer.
Network architectures (such as Ethernet, ARCnet, Token Ring, and FDDI) encompass the Data-Link and Physical Layers and represent the most common protocols used. The Data Link layer is responsible for constructing and transmitting data packets as well as receiving and deconstructing data packets, both sequences based upon the network architecture being employed. The Data-Link layer provides services for the various protocols at the Network Layer and uses the Physical Layer to transmit and receive the data packets. In a Local Area Network Carrier Sense Multiple Access with Collision Detection (LAN CSMA/CD) implementation according to the Institute of Electrical and Electronics Engineers, Inc. (IEEE) Standard 802.3 or 802.3u-1995 (IEEE Standards) (See IEEE 802.3 Standard for Carrier Sense Multiple Access with Collision Detect (CSMA/CD) Access method and Physical Layer Specifications, 1998 Edition), the Data-Link Layer is divided into two sub-layers, the Logical-Link Control (LLC) sub-layer at the top and the Media-Access Control (MAC) sub-layer at the bottom. The LLC sub-layer provides an interface for the Network Layer protocols while the MAC sub-layer provides access to a particular physical encoding and transport scheme of the Physical Layer. The MAC sub-layer is typically executed by a MAC device that operates at one of several standard clock frequencies. Similarly, the Physical Layer is typically executed by a Physical Layer Device (PHY) that is responsible for transmitting and receiving digital code from a communications media or line, and converting the digital signals into higher intelligence signals for the device MAC.
Several structures and protocols are known for implementing the Data Link (e.g., a MAC) and Physical Layers (e.g., a PHY). Ethernet using coaxial, twisted pair or fiber-optic cables operates at 10 megabits per second (Mbps) (e.g., 10BASE-T, 10BASE-F) while fast Ethernet operates at 100 Mbps (e.g., 100BASE-T, 100BASE-FX). ARCnet (Attached Resource Computer Network) is a relatively inexpensive network structure using coaxial, twisted pair or fiber-optic cables operating at 2.5 or 20 Mbps. Token Ring topologies use special IBM cable or fiber-optic cable and operate between 1 and 16 Mbps. Fast Token Ring operates at 100 Mbps. A new standard is being developed called ATM (Asynchronous Transfer Mode), which operates at speeds of 25.6 or 155 Mbps, although newer versions may operate at even higher data rates. Of course, various other network structures are known and available.
Over the years, many networks have been designed to operate in 10BASE-T protocol. However, as faster and more sophisticated communication became possible through improvements in equipment and technology, it has become desirable to provide multi-service protocols which can support both older protocols, such as 10BASE-T, as well as additional communication protocols such as those listed above. This is so that it is not necessary to replace the entire network and related components with new equipment when upgrading to the newer protocol.
During network communications, the Physical Layer (e.g., a PHY) receives data packets from the Data-Link Layer (e.g., a MAC) above it and converts the contents of these packets into a series of electrical signals that represent 0 and 1 values in a digital transmission. These signals are sent across a transmission medium to a partner Physical Layer at the receiving end of the network link. At the destination, the partner Physical Layer (e.g., a PHY) converts the electrical signals into a series of bit values, which are grouped into packets and passed up to the Data-Link Layer (e.g., a MAC) of the destination device by the Physical Layer (e.g., a PHY) of the destination partner network device.
b. Prior LAN Systems
FIG. 1 is a block diagram of a typical prior LAN system showing key functional components. It illustrates one of the most common IEEE 802.3 Ethernet communications links, which requires two PHY layer devices (e.g., a network interface card (NIC) 112 and a Switch device 114) in order to communicate. The Switch device comprises a switch 120 connected to media access controllers (MACs) 116, which are in turn connected to switch physical layer devices (Switch PHYs) 118, which are connected to a wired link 122. Similarly, the NIC 112 comprises a media access controller (MACs) 116 connected to a NIC physical layer device (NIC PHYs) 124, which is also connected to the wired link 122.
The switch device media access controllers (MACs) 116 provide data media to the switch device physical layer devices (Switch PHYs) 118, which in turn transmit and receive data from the wired link 122. Similarly, the NIC 112 media access controller (MACs) 116 providing data media to the NIC physical layer device (NIC PHYs) 124, which in turn transmits and receives data from the wired link 122. Thus, by using a communications language, mode, or protocol that the other “partner” understands, the switch and NIC are able to “talk” to each other over the “link”.
The wired link 122, or media connecting two PHYs normally consists of two twisted-pair cables, with one pair utilized for receiving data and the other for transmitting data. However, various other appropriate wired link 122 media may be used to connect PHYs, such as coax cable, fiber optic cable, satellite links, cell links, radio waves, etc.
c. Physical Layer Devices (PHYs)
FIG. 2 is a block diagram of a typical prior physical layer device (PHY) 200 showing key functional components. The same basic PHY circuits can be utilized in both a network interface card (NIC), a Switch PHY circuit, as well as other network devices using various media as discussed above. Similarly, a PHY may be implemented either as a standalone single or multi-channel (e.g., 4 PHYs on a chip) device, or an integral component within a higher integrated controller that has PHY devices. The PHY function may also be implemented using a variety of an integrated circuit technology. For example, PHY functionality may be provided through a predominantly analog circuit approach or through use of a digital signal processor.
As shown in FIG. 2, a Media Independent Interface (MII) Registers and Interface Logic component 202 is connected to a transmit PHY functions component 204, and a receiver PHY functions component 206. In turn, the transmit PHY functions component 204 is connected to transmitter circuits 208. The transmitter circuits 208 are connected to a wired link 122. Likewise, the receiver PHY functions component 206 is connected to a normal and fast link pulse and valid frame detector 214, and receiver circuits 210. The receiver circuits 210 are in turn connected to the wired link 122. The transmitter circuits 208 are also connected to a normal and fast link pulse generator 212. The receiver circuits 210 are connected to a normal and fast link pulse and valid frame detector 214. An auto-negotiation state machine 216 is attached to the normal and fast link pulse generator 212, and the normal and fast link pulse and valid frame detector 214.
As part of the IEEE 802.3 standard, the MII Registers and Interface Logic component 202 provides a common interface for connecting the PHY 200 with a MAC. The MII is capable of interfacing the PHY with different types of standardized MACs so that different vendors can design standardized products that will successfully interface.
The transmit PHY functions component 204 controls the transmitter circuits 208, which transmit across the wired link 122. Likewise, the receiver PHY functions component 206 controls the receiver circuits 210, which receive data from the wired link 122.
The normal and fast link pulse generator 212 provides normal link pulses (NLPs) and fast link pulses (FLPs) used to confirm PHY connection to other “partner” or “remote” PHY's. For example, the PHY normal and fast link pulse generator 212 will generate NLPs which are then transmitted across the wired link 122 to tell a remote PHY that the transmitting PHY is still connected (i.e. an “I'm here” signal). Herein, the PHY under discussion will be referred to as simply “PHY” and a PHY at the other end of a link will be referred to as a “partner PHY” or “remote PHY”. Unless stated otherwise, a partner or remote PHY behaves in the same manner as the PHY described within.
Similarly, the normal and fast link pulse and valid frame detector 214 provides normal and fast link detection for confirming a valid link with another PHY. For example, when NLPs received from the wired link 122 by the PHY receiver are detected by the normal and fast link pulse and valid frame detector 214, a valid link with the remote PHY transmitting the NLPs is confirmed. Thus, for 10-BASE-T communications, the indication to a remote PHY receiving and detecting NLP's is that all is well on the link. On the other hand, if no pulses are received by an expecting remote PHY, the link is assumed dead.
The auto-negotiation state machine 216 provides to the pulse generator 212 and recognizes from the pulse and frame detector 214, various parameters used to set up the operational mode of the communications link. For instance, the method of communication between two PHYs can be either half-duplex (receive or transmit only) or full-duplex (receive and transmit simultaneously). In addition, the auto-negotiation block sets up other parameters such as the speed of the link (e.g., 10 Mbps, 100 Mbps or 1000 Mbps), as well as the type of signaling and encoding schemes used (e.g., 100BASE-T4, 100BASE-T2). The IEEE 802.3 Standard auto-negotiation Section (IEEE Std 802.3, 1998 Ed., Section 28) provides for negotiation between two network endpoints. For example, the IEEE specifies protocol used by a linked node and hub to select a link configuration compatible to both endpoints. Thus, the auto-negotiation block is responsible for negotiating with its remote PHY partner to achieve the desired mode of operation.
The type of pulses used by a PHY to negotiate a link vary depending on the type of PHY. For example, at power on, an old standard 10BASE-T, 10 Mbps capacity PHY will transmit Normal Link Pulses (NLPs). Thus any PHY receiving NLPs is informed that it is communicating with a 10BASE-T partner, and will continue operations in 10BASE-T mode. In 10BASE-T mode, NLPs are transmitted during link negotiation as well as when the link is idle (e.g., when no data packets are being transmitted). Consequently, the NLP is known as the “link integrity pulse” or “link test pulse”.
Newer 10BASE-T PHYs and 100BASE-T PHYs use Fast Link Pulses (FLPs) during link set up. FLPs allow for the passage of auto-negotiation parameters. In addition, FLPs are designed to be interpreted as NLPs by non-FLP capable PHYs. Thus, to an old 10BASE-T PHY, FLPs used during link negotiation will look like NLPs. Conversely, a newer 10BASE-T PHY will be capable of transmitting and interpreting Fast Link Pulses (FLPs), and hence will be able to detect both 10BASE-T and 100BASE-T modes of operation.
FIG. 3 is a waveform diagram of link negotiation pulses showing NLPs and FLPs. Referring to FIG. 3, pulses 302 are sent by both PHYs during link negotiation. NLPs, typically consist of a pulses 304 sent every 16±8 ms. However, FLPs typically consist of bursts of pulses 306, no more than 2 ms in duration, sent every 16±8 ms. Generally, each FLP burst of pulses 306 consists of a series of clock and data pulses. The data pulses usually carry link negotiation data indicating link speed, duplex mode, etc.
Hence, during auto negotiation, higher speed PHYs exchange information identifying what type of PHY they are and what their communications mode capabilities are. For instance, at power on, a Fast Ethernet (100BASE-T) capable PHY will startup by pulsing the media line with Fast Link Pulses (FLP) to inform remote PHYs of its existence on the line. A remote PHY will operate in a similar fashion, pulsing the media line with FLPs. When a return FLP is received by the powered on PHY, that PHY will detect the FLPs, decipher the data bits encoded therein, and identify the transmitted parameters. Generally, current systems allow the PHYs to “advertise” in this manner what mode each is capable of. The highest common operational mode is then chosen. For example, if one of the PHYs advertises 10BASE-T full duplex and the other PHY advertises 100BASE-TX full duplex, the PHY advertising 100BASE-TX will reconfigure its advertisements to the lower 10BASE-T full duplex capability.
Also, auto negotiation generally only occurs following a reset, or typically following a link failure or power up. Thus, once a link has been auto negotiated, the PHYs retain the communications mode agreed upon even though other parameters or modes may change during communications. For instance, to and from a data transmission state and an idle state.
In prior systems, a first PHY must continually transmit a signal waveform in order to maintain the link with a partner PHY at the other end for two reasons. First, the partner PHY will assume the link is severed if an identifiable waveform of signal is not received for a certain length of time, and second, the partner PHY receiver may loose its “lock” on the timing of the incoming waveform's bits and thus will not be able to decipher them. Thus, when data packets are not being transmitted over the link to a remote PHY, some other type of signal or pulse must be sent.
The type of pulses used by a PHY in between data packet transmissions varies depending on the mode of operation negotiated for that link. For example, if the link operational mode is 10BASE-T, a PHY will transmit Normal Link Pulses (NLPs) in between data packets. In this case, each PHY must continually transmit NLPs between data packets (or FLPs to be interpreted as NLPs) or the partner PHY will assume the link is severed because no identifiable signal has been received for a “timeout” period.
Alternatively, if the link operational mode is 100BASE-T, a PHY will transmit a stream of “idles” in between data packets. In the 100BASE-T case, a PHY must continually transmit the “idles” in order to keep the partner PHY from assuming the link is severed due to no identifiable waveform over a “timeout” period, as well as so that the partner PHY receiver does not loose its “lock” on the timing of the incoming bits. Unlike the slower 10BASE-T mode where there is enough time for the receiving PHY's circuitry to re-align to the timing of received data pulses, in 100BASE-T mode, it is necessary to fill the “quiet” time between data packets with a signal that enables the receiving PHY to remain in synchronization with the data pulses of a received packet. Such synchronization is necessary because at 100 Mbps (100BASE-T mode), there is usually not enough time for the receiving PHY's circuitry to re-align to the timing of newly received data pulses immediately following a significant “quiet” period.
For example, for 100BASE-T, the partner PHY receiver must lock onto a 125 Mbps bit stream (4 bits are encoded into 5 bits during transmission). Thus, the partner PHY receiver must distinguish within 8 Nano seconds per pulse bit, whether that bit is a “1” or a “0” (multiple voltage levels or voltage transitions may be used, for example, in this case MLT3 having three voltage levels corresponding to +1, 0, and −1 can be implemented with a transition to the next voltage level representing a “1” and no transition a “0”). In order to make this distinction, PHY receivers typically use a Phase Lock Loop (PLL) to tune to the transmitting PHY's output. The tuned PLL lets the PHY receiver sample the correct points in the received signal to determine if that location or bit in the waveform is a “1” or “0”. Further, the receiver PLL is capable of “drifting” or adapting the time at which it takes a sample, with the drifting timing or “phase” of the received waveform characteristics. Thus the PLL is able to sample for “1” or “0” distinctions at optimum waveform locations, even when those locations drift.
The PLL recovers the phase or timing of the incoming clock thereby determining the timing information of the signal being received. For example, when digital pulses or bits (1's, and 0's) are being received from the media, the PLL is also receiving a timing pulse signal as well. The timing pulse signal lets the PLL know where the next bit will begin, so the receiver can sample the waveform at the proper point to distinguish whether a bit is a “0” or a “1”. Thus, using the recovered clock from the PLL, the receiver knows when to expect the next digital signal bit.
Additionally, to assist the PLL, most receivers use an equalizer to adjust for the characteristics of the incoming line. Various types of equalizers (e.g., adaptive, fixed, etc.) can be used to balance out the effect the characteristics of the media have on the incoming signal. For example, a twisted pair cable typically experiences an attenuation which is a function of its length and the frequency of the signal. The equalizer may compensate for the attenuation by creating a frequency dependant gain. This results in a frequency response that is as flat as possible, across the spectrum, for that cable length. Digital signal processor (DSP) based equalizers often use “coefficients”, which are a numeric table of information, to map the input characteristics of a link.
d. Power Consumption
In a common network environment, the transmitters and receivers at both ends of the associated network link use a cycle template to enable the exchange of data. The cycle template continues to be exchanged even when the template contains little or no data. This continuous transmittal of the template requires the continual expenditure of transmitter and receiver power.
Power consumption directly influences the cost of operating the device, limits design possibilities, and is of particular importance if the network component is battery driven. For example, if the network device is a laptop computer, the useful operating life of the device is a direct function of battery life.
Additionally, providing support for continuous transmittal of templates for an entire multi-service network requires significant individual network device power, as well as overall network power. Hence, the desire to reduce power consumption in LAN NICs, LAN switch equipment, and other LAN apparatus has resulted in many vendors producing low power PHY devices. However, as will be explained, there is a limit to the amount of power reduction that is possible with today's implementation of physical layer (PHY) devices.
For example, there are several industry schemes and specifications designed to manage or conserve power in a personal computer (PC) environment by powering certain PC components on and off as necessary during PC use. This scheme is generally referred to as Wake-on LAN (WOL), though different vendors may call their particular implementation something different.
For instance Microsoft Wake-on LAN™ and Advanced Micro Device's Magic Packet™ are classic examples of such schemes. Likewise, the most prevalent specifications are Microsoft OnNOw™ and the ACPI (See Advanced Configuration and Power Interface Specification (ACPI), Version 1.0b, Feb. 2, 1999). There is a provision within these industry defacto standards that supports the ability to remotely wake up or put to sleep a networked PC/workstation using specific types of data packets. Thus, using such a scheme it is possible for a PC to enter a suspended mode, or be put to sleep upon receiving a packet over a network.
WOL wake-up and sleep packets are usually generated by a central management station that is responsible for managing all the PC/workstations and network devices in a network. WOL may be used simply to switch machines on or off, or automatically wake them up for software maintenance at night when the machines are not in use. These applications require a NIC to consume very little power, but be capable of waking up as soon as a packet is sent to that NIC over the network. Thus, a WOL capable PC that is connected to a LAN can be “woken up” from a power suspend mode by a wake-up packet received over the network by the PC's PHY, from a partner network device. Use of such technology allows network managers to wake up a sleeping PC update the software and then switch the PC back off.
However, a certain portion of the PC's network device must always stay on to allow the network device to be woken up from a remote location in order to wake the rest of the PC up. Thus, although a lower power states for the overall NIC may be entered in prior systems, in order to allow for Wake-on LAN capability, it is necessary for the PHY part of the NIC to stay fully powered. The fully powered PHY continually transmits and receives signals, so that a channel is kept open for receiving a “wake up” packet from a partner network device.
An example of an early WOL scheme is Magic Packet™ from AMD. Similar to a programmable VCR waking up at a certain time to record a show, Magic Packet allows a PC to be woken up from across a network without re-booting. A Magic Packet is defined as a standard Ethernet MAC frame that contains the address of the target PC NIC that is to be woken up, repeated 16 times within the packet itself. These 16 instances of the station's IEEE MAC address are preceded by 6 bytes of FF. The destination address field within the MAC frame can be either the address of the individual station to be woken up or a multicast/broadcast address i.e. an address that will be received by the PC's MAC controller device.
For example, Magic Packet gives the following example of a data sequence within a Magic Packet for a station with IEEE address ‘112233445566’ as:                DA, SA, <misc>, FF, FF, FF, FF, FF, FF, 11, 22, 33, 44, 55, 66, 11, 22, 33, 44, 55, 66, <plus 14 times 11, 22, 33, 44, 55, 66>, <misc>, CRC.        
In another example, the OnNow WOL scheme utilizes a more comprehensive packet-filtering scheme to detect certain types and protocols carried within a frame. There are three basic types of wake up mechanisms defined in the OnNow specification:                Wake up on link status change        Wake up on Magic Packet        Wake up on match against a predefined byte-frame mask stored within the MAC device        
When in a suspend or sleep mode, the majority of the PC/workstation components are put to sleep, including the main CPU and any network software device drivers that may be interfacing to the LAN adapter. Hence, a WOL capable network device must be capable of looking at a packet and deciding if it is the correct one to wake up the PC/workstation while the rest of the machine is asleep. If the packet content is a correct match, then the adapter will produce an interrupt, which invokes the power management software. This in turn will decide if the PC/workstation is to be fully woken up, woken up just to deal with this one request with a low level device driver, or simply ignored.
In current network devices, in order to receive a wake up packet or other signal it is necessary for PHYs to stay fully powered constantly transmitting on the link between two network devices. As a result, a lower power constant idle state has been developed having Idle Symbols or Pulses that are a specific pattern of low level symbols. Thus, transmission of a continuous waveform can be accomplished in order to hold the link between two PHYs by interlacing data packets with a constant transmission of such low power idles pulses when data transmission is suspended. Nevertheless, the constant idle pulse state requires the PHY transmitter to be fully powered and the PHY is a significant contributor to the power consumption of network devices, adapters, hubs, and switches.
In prior systems, a PHY must transmit a waveform of continuous normal idles when data packets are not being transmitted in order to keep a partner PHY receiver locked into the signal that the first PHY is sending. If the partner PHY receiver fails to detect normal link idles, or data bits for a specified period, the receiver will assume that the link has been broken and the partner PHY will reset. For example, a Fast Ethernet 100BASE-TX PHY assuming the link is broken will set its Link OK flag to “false”, enter the no-connect mode, and then begin auto-renegotiation by sending FLPs across the link to determine if it can adequately re-connect to the partner PHY. Thus, upon receipt of FLPs from the PHY, the partner PHY will return FLPs to link with the PHY. However, if a data packet is transmitted to either PHY prior to completion of the auto re-negotiation, the data will not be received, but instead will be “lost”.
In relation to power management standards, ACPI defines three levels of power down that apply to LAN adapters:                D0—fully operational        D1, D2—various levels of power down (some implementations may support WOL in the D1/2 states)        D3 hot—usually Wake-On LAN state        D3 cold—fully powered down with all functional units non-operational        
Thus ACPI network devices operate in Network Device Power States D0, D1, D2, and D3.
In the D0 state, the device, including the PHY is fully powered and can freely transmit and receive data and/or idles. In the D1 and D2 or intermediate states, the device is less than fully powered, but requires the PHY to be fully powered in order to constantly transmit idle frames, even though other components of the NIC may be at less than full power. Note that some ACPI implementations support WOL in the D1 or D2 states. D3 has a “D3-hot” and a “D3-cold” state.
In D3-hot, or what prior systems call the Wake-on LAN state, the PHY is still powered up and constantly sending idle frames (symbols) because if the partner PHY fails to receive idles, it may assume that the connection has been broken (dead wire, unplugged wire, etc.) and will reset. To reset, the PHY will go to the reconnect state, and will begin transmitting in full power D0 mode (FLPs for 100BASE-T, or NLPs for 10BASE-T) to determine if the link has been physically broken, or if there was some other error. While in D3-hot, because the PHY is transmitting and receiving, the NIC may be forced back to D0 status by the partner PHY sending a re-initialization “wake up” packet.
In D3-cold the PHY may be powered down, but its receiver can not then receive a “wake up” packet. Thus, the PHY is not able to be woken up in D3-cold, and hence the PHY, NIC, PC, or workstation must be re-initialized or reset locally.
Various power requirements need to be met in the D3 states. For example, in Cardbus NIC applications, the D3-hot state requires no more than 200 mA to be drawn in total by the card in the Wake-up state, whereas the D3 cold requires no more than 5 mA. The challenge to the systems designers is that typical Fast Ethernet PHY devices today can draw more than 100-150 mA when configured in WOL mode, and therefore may exceed the 200 mA limitations. This is especially so for multi-function cards, such as LAN and Modem NICs where there are several potentially high powered devices utilized.
Much of the power consumed by a PHY goes to the transmitter, as it must be capable of driving up to 100-meters of category-5 cable and maintain IEEE compliance. Moreover, PHYs are usually over-designed to operate higher power to compensate for poor line conditions.
Consequently, as shown above, most point-to-point LAN links that exist today have no method or capacity to shut off their transmitter power between valid data transmissions or during a sleep or suspended state. For example, switching off a PHY's transmitter altogether would result in the remote partner PHY detecting a loss of link due to the lack of a transmitted signal, NLP, or scrambled idle stream being received by its receiver. As a result, the constant idle pulse state requires the PHY transmitter to be fully powered and the PHY is a significant contributor to the power consumption of network devices, adapters, hubs, and switches.
Fast Ethernet PHYs have already been designed for low voltage and/or low power operation. The overall power consumption of the PHY is reduced by reducing the operational power consumption by using lower voltages. However, there is a physical limit to the amount of power reductions that can be made to the PHY without losing IEEE compliance or compromising reliability.
In the case of standard Fast Ethernet PHY devices, when a NIC is the WOL mode, the PHY has to remain functioning at its full typical idling power even when little or no data is being transmitted or it will loose the link. Hence, a PHY capable of turning its transmitter off during quiet periods would save significant power.
In addition, there is no current method of notifying a remote network node via a simple PHY signaling scheme of the type of schemes a network node supports or requires when waking from a sleep or suspend state.